4116 search results - page 134 / 824 » Type Analysis for CHIP |
RECOMB
2002
Springer
14 years 9 months ago
2002
Springer
We present a new statistically optimal approach to estimate transcript levels and ratios from one or more gene array experiments. The Bayesian Estimation of Array Measurements (BE...
DFT
2009
IEEE
14 years 3 months ago
2009
IEEE
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
DDECS
2007
IEEE
14 years 3 months ago
2007
IEEE
Abstract: High speed DRAMs today suffer from an increased sensitivity to interference and noise problems. Signal integrity issues, caused by bit line and word line coupling, result...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
ADAEUROPE
2005
Springer
14 years 2 months ago
2005
Springer
This paper describes the methodology used to add nonintrusive system-level fault tolerance to an electronic throttle controller. The original model of the throttle controller is a...