83 search results - page 9 / 17 » UML design for dynamically reconfigurable multiprocessor emb... |
ERSA
2006
13 years 8 months ago
2006
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
ASAP
2008
IEEE
13 years 9 months ago
2008
IEEE
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
ASAP
2008
IEEE
14 years 1 months ago
2008
IEEE
This article discusses the design of an application specific MPSoC architecture dedicated to Multiple Target Tracking (MTT). This application has its utility in driver assistant s...
CODES
2003
IEEE
14 years 21 days ago
2003
IEEE
We present an approach to the automatic derivation of executable Process Network specifications from Weakly Dynamic Applications. We introduce the notions of Dynamic Single Assig...
VLSISP
2008
13 years 7 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...