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FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 10 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
ACL
1998
15 years 5 months ago
Automatic Construction of Frame Representations for Spontaneous Speech in Unrestricted Domains
This paper presents a system which automatically generates shallow semantic frame structures for conversational speech in unrestricted domains. We argue that such shallow semantic...
Klaus Zechner
DAC
2012
ACM
13 years 6 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
ISQED
2005
IEEE
92views Hardware» more  ISQED 2005»
15 years 9 months ago
Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays
In this paper, design and measurement results of a test chip that intends to evaluate differences between layout techniques for rectangular unit-capacitor arrays are introduced. P...
DiaaEldin Khalil, Mohamed Dessouky, Vincent Bourgu...
VLSID
2000
IEEE
135views VLSI» more  VLSID 2000»
15 years 7 months ago
Performance and Functional Verification of Microprocessors
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Pradip Bose, Jacob A. Abraham