1181 search results - page 159 / 237 » UMTS MPSoC design evaluation using a system level design fra... |
SLIP
2003
ACM
14 years 1 months ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
ACSAC
2008
IEEE
14 years 2 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
VLDB
1999
ACM
14 years 5 days ago
1999
ACM
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
MSE
2003
IEEE
14 years 1 months ago
2003
IEEE
A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Intern...
MICRO
2008
IEEE
14 years 2 months ago
2008
IEEE
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...