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» Ultra low power digital signal processing
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CHES
2008
Springer
134views Cryptology» more  CHES 2008»
13 years 9 months ago
Ultra High Performance ECC over NIST Primes on Commercial FPGAs
Elliptic Curve Cryptosystems (ECC) have gained increasing acceptance in practice due to their significantly smaller bit size of the operands compared to other public-key cryptosyst...
Tim Güneysu, Christof Paar
VLSISP
2008
147views more  VLSISP 2008»
13 years 6 months ago
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sun...
ICASSP
2010
IEEE
13 years 8 months ago
Stability analysis of an adaptive Wiener structure
In the context of digital pre-distortion, a typical requirement is to identify the power amplifier with stringently low computational complexity. Accordingly, we consider a simpl...
Robert Dallinger, Markus Rupp
ASPDAC
2007
ACM
115views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Development of Low-power and Real-time VC-1/H.264/MPEG-4 Video Processing Hardware
- This paper covers a multi-functional hardware intellectual property (IP) for the encoding and decoding of digital moving pictures with low power consumption. The IP is mainly int...
M. Hase, K. Akie, M. Nobori, K. Matsumoto
ISLPED
2005
ACM
109views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power reduction by varying sampling rate
The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a ...
William R. Dieter, Srabosti Datta, Wong Key Kai