1872 search results - page 176 / 375 » Unbalanced Cache Systems |
IPPS
2003
IEEE
14 years 3 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
ICPP
1998
IEEE
14 years 2 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
ASPLOS
1992
ACM
14 years 2 months ago
1992
ACM
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
SC
1995
ACM
14 years 2 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
LCTRTS
2009
Springer
14 years 5 months ago
2009
Springer
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...