1872 search results - page 182 / 375 » Unbalanced Cache Systems |
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
ISSS
2000
IEEE
14 years 3 months ago
2000
IEEE
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
EUROPAR
2007
Springer
14 years 4 months ago
2007
Springer
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
ESTIMEDIA
2005
Springer
14 years 4 months ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
VLDB
1995
ACM
14 years 2 months ago
1995
ACM
: This paper defines a framework for explaining redo recovery after a system crash. In this framework, an installation graph explains the order in which operations must be install...