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MICRO
2003
IEEE
142views Hardware» more  MICRO 2003»
15 years 7 months ago
Hardware Support for Control Transfers in Code Caches
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
Ho-Seop Kim, James E. Smith
SBACPAD
2003
IEEE
135views Hardware» more  SBACPAD 2003»
15 years 7 months ago
Adaptive Compressed Caching: Design and Implementation
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
Rodrigo S. de Castro, Alair Pereira do Lago, Dilma...
OSDI
1994
ACM
15 years 3 months ago
A Caching Model of Operating System Kernel Functionality
Operating system research has endeavored to develop micro-kernels that provide modularity, reliability and security improvements over conventional monolithic kernels. However, the...
David R. Cheriton, Kenneth J. Duda
122
Voted
RTCSA
2008
IEEE
15 years 9 months ago
Impact of Cache Partitioning on Multi-tasking Real Time Embedded Systems
Cache partitioning techniques have been proposed in the past as a solution for the cache interference problem. Due to qualitative differences with general purpose platforms, real-...
Bach Duy Bui, Marco Caccamo, Lui Sha, Joseph Marti...
109
Voted
ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
15 years 11 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid