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ACMMSP
2005
ACM
101views Hardware» more  ACMMSP 2005»
14 years 3 months ago
Transparent pointer compression for linked data structures
64-bit address spaces are increasingly important for modern applications, but they come at a price: pointers use twice as much memory, reducing the effective cache capacity and m...
Chris Lattner, Vikram S. Adve
SIGMETRICS
2005
ACM
150views Hardware» more  SIGMETRICS 2005»
14 years 3 months ago
An analytical model for multi-tier internet services and its applications
- Since many Web applications employ a multi-tier architecture, in this paper, we focus on the problem of analytically modeling the behavior of such applications. We present a mode...
Bhuvan Urgaonkar, Giovanni Pacifici, Prashant J. S...
ISCA
2003
IEEE
104views Hardware» more  ISCA 2003»
14 years 3 months ago
Token Coherence: Decoupling Performance and Correctness
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
Milo M. K. Martin, Mark D. Hill, David A. Wood
HIPC
1999
Springer
14 years 2 months ago
Process Migration Effects on Memory Performance of Multiprocessor
Abstract. In this work we put into evidence how the memory performance of a WebServer machine may depend on the sharing induced by process migration. We considered a shared-bus sha...
Pierfrancesco Foglia, Roberto Giorgi, Cosimo Anton...
ICPP
1994
IEEE
14 years 2 months ago
Cachier: A Tool for Automatically Inserting CICO Annotations
Shared memory in a parallel computer provides prowith the valuable abstraction of a shared address space--through which any part of a computation can access any datum. Although un...
Trishul M. Chilimbi, James R. Larus