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LCTRTS
2010
Springer
15 years 7 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
156
Voted
ECRTS
2005
IEEE
15 years 8 months ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
142
Voted
LCTRTS
2007
Springer
15 years 8 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
15 years 8 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
140
Voted
HIPEAC
2010
Springer
15 years 11 months ago
Scalable Shared-Cache Management by Containing Thrashing Workloads
Abstract. Multi-core processors with shared last-level caches are vulnerable to performance inefficiencies and fairness issues when the cache is not carefully managed between the m...
Yuejian Xie, Gabriel H. Loh