Sciweavers

865 search results - page 13 / 173
» Uncertainty Reduction Using Dynamics
Sort
View
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
14 years 22 days ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
14 years 1 hour ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
14 years 5 months ago
Precomputation-based Guarding for Dynamic and Leakage Power Reduction
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
Afshin Abdollahi, Massoud Pedram, Farzan Fallah, I...
IFM
2009
Springer
124views Formal Methods» more  IFM 2009»
14 years 3 months ago
Dynamic Path Reduction for Software Model Checking
We present the new technique of dynamic path reduction (DPR), which allows one to prune redundant paths from the state space of a program under verification. DPR is a very general...
Zijiang Yang, Bashar Al-Rawi, Karem Sakallah, Xiao...
INFOCOM
2007
IEEE
14 years 2 months ago
Reduction of Quality (RoQ) Attacks on Dynamic Load Balancers: Vulnerability Assessment and Design Tradeoffs
—One key adaptation mechanism often deployed in networking and computing systems is dynamic load balancing. The goal from employing dynamic load balancers is to ensure that the o...
Mina Guirguis, Azer Bestavros, Ibrahim Matta, Yuti...