1052 search results - page 26 / 211 » Understanding POWER multiprocessors |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
HIPEAC
2009
Springer
14 years 2 months ago
2009
Springer
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
DSD
2009
IEEE
14 years 2 months ago
2009
IEEE
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...
DSN
2007
IEEE
14 years 2 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
CASES
2009
ACM
13 years 11 months ago
2009
ACM
Reducing feature sizes and power supply voltage allows integrating more processing units (PUs) on multiprocessor system-on-chip (MPSoC) to satisfy the increasing demands of applic...