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» Understanding POWER multiprocessors
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HPCA
2006
IEEE
14 years 8 months ago
CMP design space exploration subject to physical constraints
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
Yingmin Li, Benjamin C. Lee, David Brooks, Zhigang...
ISCA
2012
IEEE
274views Hardware» more  ISCA 2012»
11 years 10 months ago
The dynamic granularity memory system
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the...
Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, Ma...
CASES
2005
ACM
13 years 9 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
PATMOS
2007
Springer
14 years 1 months ago
XEEMU: An Improved XScale Power Simulator
Energy efficiency is a top requirement in embedded system design. Understanding the complex issue of software power consumption in early design phases is of extreme importance to m...
Zoltán Herczeg, Ákos Kiss, Daniel Sc...
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Analysis and optimization of gate leakage current of power gating circuits
— Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling dow...
Hyung-Ock Kim, Youngsoo Shin