Sciweavers

1052 search results - page 76 / 211
» Understanding POWER multiprocessors
Sort
View
ESANN
2004
13 years 11 months ago
Self-organizing context learning
This work is designed to contribute to a deeper understanding of the recently proposed Merging SOM (MSOM). Its context model aims at the representation of sequences, an important s...
Marc Strickert, Barbara Hammer
ECSCW
1997
13 years 11 months ago
On Distribution, Drift and the Electronic Medical Record: Some Tools for a Sociology of the Formal
: Formal tools (i.e , tools that operate on circumscribed input using rules, and that contain a model of the workplace in which are to function) are attributed central roles in org...
Marc Berg
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 4 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
PDP
2010
IEEE
14 years 2 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
HPCA
2009
IEEE
14 years 10 months ago
Express Cube Topologies for on-Chip Interconnects
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...