This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
Architects use cycle-by-cycle simulation to evaluate design choices and understand tradeoffs and interactions among design parameters. Efficiently exploring exponential-size desig...
Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R...
—The inherent many-to-one flow of traffic in Wireless Sensor Networks produces a skewed distribution of energy consumption rates leading to the early demise of those sensors that...
Bayesian Network (BN) is a powerful network model, which represents a set of variables in the domain and provides the probabilistic relationships among them. But BN can handle dis...