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WEA
2009
Springer
165views Algorithms» more  WEA 2009»
15 years 9 months ago
On Computational Models for Flash Memory Devices
Flash memory-based solid-state disks are fast becoming the dominant form of end-user storage devices, partly even replacing the traditional hard-disks. Existing two-level memory hi...
Deepak Ajwani, Andreas Beckmann, Riko Jacob, Ulric...
CIDR
2011
237views Algorithms» more  CIDR 2011»
14 years 8 months ago
Rethinking Database Algorithms for Phase Change Memory
Phase change memory (PCM) is an emerging memory technology with many attractive features: it is non-volatile, byte-addressable, 2–4X denser than DRAM, and orders of magnitude be...
Shimin Chen, Phillip B. Gibbons, Suman Nath
ASPLOS
2010
ACM
15 years 11 months ago
Dynamically replicated memory: building reliable systems from nanoscale resistive memories
DRAM is facing severe scalability challenges in sub-45nm technology nodes due to precise charge placement and sensing hurdles in deep-submicron geometries. Resistive memories, suc...
Engin Ipek, Jeremy Condit, Edmund B. Nightingale, ...
TVCG
2010
198views more  TVCG 2010»
14 years 11 months ago
Isodiamond Hierarchies: An Efficient Multiresolution Representation for Isosurfaces and Interval Volumes
Efficient multiresolution representations for isosurfaces and interval volumes are becoming increasingly important as the gap between volume data sizes and processing speed continu...
Kenneth Weiss, Leila De Floriani
ISCA
2005
IEEE
181views Hardware» more  ISCA 2005»
15 years 10 months ago
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
Evan Speight, Hazim Shafi, Lixin Zhang, Ramakrishn...