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MICRO
1997
IEEE
110views Hardware» more  MICRO 1997»
15 years 8 months ago
The Design and Performance of a Conflict-Avoiding Cache
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
Nigel P. Topham, Antonio González, Jos&eacu...
CLUSTER
2002
IEEE
15 years 9 months ago
Mixed Mode Matrix Multiplication
In modern clustering environments where the memory hierarchy has many layers (distributed memory, shared memory layer, cache,  ¡ ¢  ), an important question is how to fully u...
Meng-Shiou Wu, Srinivas Aluru, Ricky A. Kendall
CORR
2011
Springer
177views Education» more  CORR 2011»
14 years 11 months ago
Measuring NUMA effects with the STREAM benchmark
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated ph...
Lars Bergstrom
ISW
2009
Springer
15 years 11 months ago
MAC Precomputation with Applications to Secure Memory
We present ShMAC (Shallow MAC), a fixed input length message authentication code that performs most of the computation prior to the availability of the message. Specifically, Sh...
Juan A. Garay, Vladimir Kolesnikov, Rae McLellan
EP
1998
Springer
15 years 8 months ago
Memory Scalability in Constraint-Based Multimedia Style Sheet Systems
Abstract. Multimedia style sheet systems uniformly use a constraintbased model of layout. Constraints provide a uniform mechanism for all aspects of style management and layout and...
Terry Cumaranatunge, Ethan V. Munson