720 search results - page 65 / 144 » Uniform Memory Hierarchies |
114
click to vote
MICRO
2006
IEEE
15 years 10 months ago
2006
IEEE
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
149
click to vote
ICDCS
2008
IEEE
15 years 11 months ago
2008
IEEE
This paper presents a scalable and adaptive decentralized metadata lookup scheme for ultra large-scale file systems (≥ Petabytes or even Exabytes). Our scheme logically organiz...
130
click to vote
DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper details the first step of the Design Trotter framework for design space exploration applied to dedicated SOCs. The aim of this step is to provide metrics in order to gu...
134
click to vote
ECOOP
2000
Springer
15 years 8 months ago
2000
Springer
Althoughthereisalargebodyofresearchonthetimeoverheadofobject oriented programs, there is little work on memory overhead. This paper takes an empirical approach to the study of this...
118
click to vote
HPCA
1997
IEEE
15 years 8 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...