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DATE
2006
IEEE
159views Hardware» more  DATE 2006»
14 years 1 months ago
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
ACL
2003
13 years 8 months ago
Self-Organizing Markov Models and Their Application to Part-of-Speech Tagging
This paper presents a method to develop a class of variable memory Markov models that have higher memory capacity than traditional (uniform memory) Markov models. The structure of...
Jin-Dong Kim, Hae-Chang Rim, Jun-ichi Tsujii
DAMON
2007
Springer
14 years 1 months ago
A general framework for improving query processing performance on multi-level memory hierarchies
We propose a general framework for improving the query processing performance on multi-level memory hierarchies. Our motivation is that (1) the memory hierarchy is an important pe...
Bingsheng He, Yinan Li, Qiong Luo, Dongqing Yang
ISCA
2011
IEEE
294views Hardware» more  ISCA 2011»
12 years 11 months ago
Moguls: a model to explore the memory hierarchy for bandwidth improvements
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, ...
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
13 years 11 months ago
Analysis of power consumption in memory hierarchies
In this paper, we note and analyze a key trade-off: as the complexity of caches increases (higher set-associativity, larger block size, and larger overall size), the power consume...
Patrick Hicks, Matthew Walnock, Robert Michael Owe...