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VLSID
2003
IEEE
96views VLSI» more  VLSID 2003»
14 years 8 months ago
Design Of A Universal BIST (UBIST) Structure
This paper introduces a Built-In Self Test (BIST) structure referred to as Universal BIST (UBIST). The Test Pattern Generator (TPG) of the proposed UBIST is designed to generate an...
Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Pari...
KES
2005
Springer
14 years 1 months ago
Recognizing and Simulating Sketched Logic Circuits
This paper presents a system for recognizing sketched logic circuits in real-time and graphically simulating them afterwords. It has been developed for use in university and school...
Marcus Liwicki, Lars Knipping
STOC
2006
ACM
149views Algorithms» more  STOC 2006»
14 years 7 months ago
Bounded-error quantum state identification and exponential separations in communication complexity
We consider the problem of bounded-error quantum state identification: given either state 0 or state 1, we are required to output `0', `1' or `?' ("don't ...
Dmitry Gavinsky, Julia Kempe, Oded Regev, Ronald d...
SIGPLAN
2002
13 years 7 months ago
An embedded language approach to teaching hardware compilation
This paper describes a course in hardware description and synthesis (hardware compilation), taught as an introductory graduate course at Chalmers University of Technology, and as a...
Koen Claessen, Gordon J. Pace
TIT
2008
84views more  TIT 2008»
13 years 7 months ago
Channel-Adapted Quantum Error Correction for the Amplitude Damping Channel
Error correction procedures are considered which are designed specifically for the amplitude damping channel. Amplitude damping errors are analyzed in the stabilizer formalism. Thi...
Andrew S. Fletcher, Peter W. Shor, Moe Z. Win