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» Universal Test Sets for Reversible Circuits
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DATE
2008
IEEE
104views Hardware» more  DATE 2008»
14 years 3 months ago
Multi-Vector Tests: A Path to Perfect Error-Rate Testing
The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the...
Shideh Shahidi, Sandeep Gupta
ET
2010
122views more  ET 2010»
13 years 5 months ago
Fault Models for Quantum Mechanical Switching Networks
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkows...
TE
2010
168views more  TE 2010»
13 years 3 months ago
Industry-Oriented Laboratory Development for Mixed-Signal IC Test Education
The semiconductor industry is lacking qualified integrated circuit (IC) test engineers to serve in the field of mixed-signal electronics. The absence of mixed-signal IC test educat...
John Hu, Mark Haffner, Samantha Yoder, Mark Scott,...
DSD
2005
IEEE
75views Hardware» more  DSD 2005»
14 years 2 months ago
An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform
We describe a new e-learning environment and a runtime platform for educational tools on digital system testing and design for testability. This environment is being developed in ...
Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogub...
JUCS
2007
95views more  JUCS 2007»
13 years 8 months ago
Using Place Invariants and Test Point Placement to Isolate Faults in Discrete Event Systems
: This paper describes a method of using Petri net P-invariants in system diagnosis. To model this process a net oriented fault classification is presented. Hence, the considered d...
Iwan Tabakow