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IPPS
2006
IEEE
15 years 10 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...
IPPS
2006
IEEE
15 years 10 months ago
Power-aware data dissemination protocols in wireless sensor networks
Recent rapid technological developments have led to the development of tiny, low-power, low-cost sensors. Such devices integrate sensing, limited data processing and communication...
Sotiris E. Nikoletseas
IPPS
2006
IEEE
15 years 10 months ago
Skewed allocation of non-uniform data for broadcasting over multiple channels
The problem of data broadcasting over multiple channels consists in partitioning data among channels, depending on data popularities, and then cyclically transmitting them over ea...
Alan A. Bertossi, Maria Cristina Pinotti
IPPS
2006
IEEE
15 years 10 months ago
Linyphi: an IPv6-compatible implementation of SSR
Scalable Source Routing (SSR) is a self-organizing routing protocol designed for supporting peer-to-peer applications. It is especially suited for networks that do not have a well...
Pengfei Di, Massimiliano Marcon, Thomas Fuhrmann
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
15 years 9 months ago
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
Rafal Karakiewicz, Roman Genov