54 search results - page 6 / 11 » Update-Based Cache Coherence Protocols for Scalable Shared-M... |
ISPASS
2007
IEEE
14 years 2 months ago
2007
IEEE
Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication beha...
HPCA
1995
IEEE
13 years 12 months ago
1995
IEEE
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
CF
2007
ACM
14 years 12 days ago
2007
ACM
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
DATE
2004
IEEE
14 years 4 days ago
2004
IEEE
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
HPCA
1998
IEEE
14 years 20 days ago
1998
IEEE
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....