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IMS
2000
123views Hardware» more  IMS 2000»
14 years 1 months ago
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
David Judd, Katherine A. Yelick, Christoforos E. K...
ICWS
2007
IEEE
13 years 11 months ago
Rich Services: The Integration Piece of the SOA Puzzle
One of the key challenges to successful systems-ofsystems integration using Web services technologies is how to address crosscutting architectural concerns such as policy manageme...
Matthew Arrott, Barry Demchak, Vina Ermagan, Claud...
MAM
2007
113views more  MAM 2007»
13 years 9 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
COMGEO
2010
ACM
13 years 8 months ago
Sensor bus: an intermediary layer for linking geosensors and the sensor web
In recent years, the standards of OGC’s Sensor Web Enablement (SWE) initiative have been applied in a multitude of projects to encapsulate heterogeneous geosensors for web-based...
Arne Broering, Theodor Foerster, Simon Jirka, Cars...
CORR
2010
Springer
156views Education» more  CORR 2010»
13 years 8 months ago
Imitation learning of motor primitives and language bootstrapping in robots
Abstract— Imitation learning in robots, also called programing by demonstration, has made important advances in recent years, allowing humans to teach context dependant motor ski...
Thomas Cederborg, Pierre-Yves Oudeyer