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RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
13 years 12 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...
JSSPP
2007
Springer
14 years 1 months ago
A Job Self-scheduling Policy for HPC Infrastructures
The number of distributed high performance computing architectures has increased exponentially these last years. Thus, systems composed by several computational resources provided ...
Francesc Guim, Julita Corbalán
CN
2004
130views more  CN 2004»
13 years 7 months ago
The effect of bandwidth and buffer pricing on resource allocation and QoS
Congestion-based pricing of network resources is a common approach in evolving network architectures that support Quality of Service (QoS). Resource usage and QoS will thus fluctu...
Nan Jin, Scott Jordan
FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 1 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
TMC
2008
132views more  TMC 2008»
13 years 7 months ago
A Cross-Layer Approach for Per-Station Fairness in TCP over WLANs
In this paper, we investigate the issue of per-station fairness in TCP over IEEE 802.11-compliant wireless local area networks (WLANs), especially in Wi-Fi hot spots. It is asserte...
Eun-Chan Park, Dong-Young Kim, Hwangnam Kim, Chong...