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JSA
2007
191views more  JSA 2007»
13 years 7 months ago
Automated memory-aware application distribution for Multi-processor System-on-Chips
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
Heikki Orsila, Tero Kangas, Erno Salminen, Timo D....
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 5 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
13 years 12 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez
JMLR
2010
139views more  JMLR 2010»
13 years 2 months ago
Tempered Markov Chain Monte Carlo for training of Restricted Boltzmann Machines
Alternating Gibbs sampling is the most common scheme used for sampling from Restricted Boltzmann Machines (RBM), a crucial component in deep architectures such as Deep Belief Netw...
Guillaume Desjardins, Aaron C. Courville, Yoshua B...
MOBIHOC
2009
ACM
14 years 8 months ago
Characterizing the exit process of a non-saturated IEEE 802.11 wireless network
In this paper, we consider a non-saturated IEEE 802.11 based wireless network. We use a three-way fixed point to model the node behavior with Bernoulli packet arrivals and determi...
Punit Rathod, Onkar Dabeer, Abhay Karandikar, Anir...