Organizations owning cyber-infrastructure assets face large scale distributed attacks on a regular basis. In the face of increasing complexity and frequency of such attacks, we ar...
Himanshu Khurana, Jim Basney, Mehedi Bakht, D. Mic...
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Although noise PSD estimation is a crucial part of noise reduction algorithms, most noise PSD estimators have problems in tracking non-stationary noise sources. Recently, a noise ...
Richard C. Hendriks, Richard Heusdens, Jesper Jens...
Abstract—Although energy-efficient real-time task scheduling has attracted a lot of attention in the past decade, most existing results assumed deterministic execution lengths f...
As technology scaling drives the number of processor cores upward, current on-chip routers consume substantial portions of chip area and power budgets. Since existing research has...
Mitchell Hayenga, Natalie D. Enright Jerger, Mikko...