122 search results - page 12 / 25 » User-controllable coherence for high performance shared memo... |
JPDC
2007
13 years 9 months ago
2007
The core of current-generation high-performance multiprocessor systems is out-of-order execution processors with aggressive branch prediction. Despite their relatively high branch...
SCI
1999
Springer
14 years 1 months ago
1999
Springer
This paper describes the parallelization of a commercial molecular dynamics simulation code, GROMOS96, on a SCI (Scalable Coherent Interface) interconnected PC cluster. The underly...
DSD
2008
IEEE
13 years 10 months ago
2008
IEEE
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
Prefetching in shared-memory multiprocessor systems is an increasingly difficult problem. As system designs grow to incorporate larger numbers of faster processors, memory latency...