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ISLPED
2003
ACM
88views Hardware» more  ISLPED 2003»
14 years 24 days ago
Reducing data cache energy consumption via cached load/store queue
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
GIS
2008
ACM
14 years 8 months ago
Should SDBMS support a join index?: a case study from CrimeStat
Given a spatial crime data warehouse, that is updated infrequently and a set of operations O as well as constraints of storage and update overheads, the index type selection probl...
Pradeep Mohan, Ronald E. Wilson, Shashi Shekhar, B...
CSB
2004
IEEE
108views Bioinformatics» more  CSB 2004»
13 years 11 months ago
Embedded Computation of Maximum-Likelihood Phylogeny Inference Using Platform FPGA
Our previous work to accelerate phylogeny inference using HW/SW(Hardware/Software) co-design has recently been extended to a more powerful embedded computing platform. In this pla...
Terrence S. T. Mak, Kai-Pui Lam
EH
2002
IEEE
105views Hardware» more  EH 2002»
14 years 15 days ago
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic
The availability of SiGe HBT devices has opened the door for Gigahertz FPGAs. Speeds over 5GHz have been reported. However, to make the idea practical, serious power management an...
Channakeshav, Kuan Zhou, Russell P. Kraft, John F....
BXML
2003
13 years 9 months ago
Rule-Based Generation of XML Schemas from UML Class Diagrams
We present an approach of how to automatically extract an XML document structure from a conceptual data model that describes the content of the document. We use UML class diagrams ...
Tobias Krumbein, Thomas Kudrass