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» Using Design Patterns for Refactoring Real-World Models
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RV
2010
Springer
220views Hardware» more  RV 2010»
13 years 4 months ago
Runtime Verification with the RV System
The RV system is the first system to merge the benefits of Runtime Monitoring with Predictive Analysis. The Runtime Monitoring portion of RV is based on the successful Monitoring O...
Patrick O'Neil Meredith, Grigore Rosu
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 3 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
LCTRTS
2005
Springer
14 years 6 days ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
SPAA
2004
ACM
14 years 4 days ago
Online algorithms for prefetching and caching on parallel disks
Parallel disks provide a cost effective way of speeding up I/Os in applications that work with large amounts of data. The main challenge is to achieve as much parallelism as poss...
Rahul Shah, Peter J. Varman, Jeffrey Scott Vitter
BMCBI
2007
98views more  BMCBI 2007»
13 years 6 months ago
Duration learning for analysis of nanopore ionic current blockades
Background: Ionic current blockade signal processing, for use in nanopore detection, offers a promising new way to analyze single molecule properties, with potential implications ...
Alexander G. Churbanov, Carl Baribault, Stephen Wi...