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TCAD
2008
89views more  TCAD 2008»
13 years 8 months ago
A New Multilevel Framework for Large-Scale Interconnect-Driven Floorplanning
We present in this paper a new interconnect-driven multilevel floorplanner, called interconnect-driven multilevelfloorplanning framework (IMF), to handle large-scale buildingmodule...
Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin
BIRTHDAY
2004
Springer
14 years 2 months ago
Duality for Three: Ternary Symmetry in Process Spaces
Ternary algebra has been used for detection of hazards in logic circuits since 1948. Process spaces have been introduced in 1995 act models of concurrent processes. Surprisingly, p...
Janusz A. Brzozowski, Radu Negulescu
FPL
1999
Springer
147views Hardware» more  FPL 1999»
14 years 26 days ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
VTS
2002
IEEE
106views Hardware» more  VTS 2002»
14 years 1 months ago
How Effective are Compression Codes for Reducing Test Data Volume?
Run-length codes and their variants have recently been shown to be very effective for compressing system-on-achip (SOC) test data. In this paper, we analyze the Golomb code, the c...
Anshuman Chandra, Krishnendu Chakrabarty, Rafael A...
ICCD
2005
IEEE
116views Hardware» more  ICCD 2005»
14 years 5 months ago
Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
Fei Hu, Vishwani D. Agrawal