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CIDR
2007
116views Algorithms» more  CIDR 2007»
13 years 10 months ago
Managing Query Compilation Memory Consumption to Improve DBMS Throughput
While there are known performance trade-offs between database page buffer pool and query execution memory allocation policies, little has been written on the impact of query compi...
Boris Baryshnikov, Cipri Clinciu, Conor Cunningham...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
14 years 2 months ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
ICIAP
2009
ACM
14 years 1 months ago
Applying Visual Object Categorization and Memory Colors for Automatic Color Constancy
This paper presents a framework for using high-level visual information to enhance the performance of automatic color constancy algorithms. The approach is based on recognizing spe...
Esa Rahtu, Jarno Nikkanen, Juho Kannala, Leena Lep...
DSD
2009
IEEE
148views Hardware» more  DSD 2009»
14 years 3 months ago
SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
Asadollah Shahbahrami, Ben H. H. Juurlink
DCC
2008
IEEE
13 years 10 months ago
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...