643 search results - page 50 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
ICCAD
1997
IEEE
14 years 27 days ago
1997
IEEE
Memory-intensive behaviors often contain large arrays that are synthesized into off-chip memories. With the increasing gap between on-chip and off-chip memory access delays, it is...
IWMM
2009
Springer
14 years 3 months ago
2009
Springer
In this paper, we investigate the effects of using three different nursery sizing policies on overall and garbage collection performances. As part of our investigation, we modify ...
SIGMETRICS
1993
ACM
14 years 23 days ago
1993
ACM
Recently there has been a surge of interest in developing performance debugging tools to help programmers tune their applications for better memory performance [2, 4, 10]. These t...
MICRO
2005
IEEE
14 years 2 months ago
2005
IEEE
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...
ISCA
1997
IEEE
14 years 27 days ago
1997
IEEE
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...