Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Ro...
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Dynamic random-access memory (DRAM) is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent loss of data. These refresh operation...
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...