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ISCA
2005
IEEE
99views Hardware» more  ISCA 2005»
14 years 2 months ago
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking
To maintain coherence in conventional shared-memory multiprocessor systems, processors first check other processors’ caches before obtaining data from memory. This coherence che...
Jason F. Cantin, Mikko H. Lipasti, James E. Smith
ASPLOS
2009
ACM
14 years 9 months ago
Early experience with a commercial hardware transactional memory implementation
We report on our experience with the hardware transactional memory (HTM) feature of two pre-production revisions of a new commercial multicore processor. Our experience includes a...
David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum
TAP
2008
Springer
153views Hardware» more  TAP 2008»
13 years 8 months ago
Bounded Relational Analysis of Free Data Types
Abstract. In this paper we report on our first experiences using the relational analysis provided by the Alloy tool with the theorem prover KIV in the context of specifications of ...
Andriy Dunets, Gerhard Schellhorn, Wolfgang Reif
HIPEAC
2010
Springer
13 years 10 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
DSN
2006
IEEE
14 years 2 months ago
Assessment of the Effect of Memory Page Retirement on System RAS Against Hardware Faults
The Solaris 10 Operating System includes a number of new features for predictive self-healing. One such feature is the ability of the Fault Management software to diagnose memory ...
Dong Tang, Peter Carruthers, Zuheir Totari, Michae...