Sciweavers

354 search results - page 18 / 71
» Using Kernel Coupling to Improve the Performance of Multithr...
Sort
View
IPPS
2007
IEEE
14 years 2 months ago
A Comprehensive Analysis of OpenMP Applications on Dual-Core Intel Xeon SMPs
Hybrid chip multithreaded SMPs present new challenges as well as new opportunities to maximize performance. Our intention is to discover the optimal operating configuration of suc...
Ryan E. Grant, Ahmad Afsahi
HOTOS
2003
IEEE
14 years 1 months ago
Cosy: Develop in User-Land, Run in Kernel-Mode
User applications that move a lot of data across the user-kernel boundary suffer from a serious performance penalty. We provide a framework, Compound System Calls (CoSy), to enhan...
Amit Purohit, Charles P. Wright, Joseph Spadavecch...
CSREAESA
2006
13 years 9 months ago
Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java
The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
Darrin M. Hanna, Michael DuChene, Girma S. Tewolde...
HPDC
2012
IEEE
11 years 10 months ago
Dynamic adaptive virtual core mapping to improve power, energy, and performance in multi-socket multicores
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...
Chang Bae, Lei Xia, Peter A. Dinda, John R. Lange
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 2 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August