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HPCA
2007
IEEE
14 years 8 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
14 years 1 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong
PATMOS
2000
Springer
13 years 11 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...
PPL
2008
264views more  PPL 2008»
13 years 7 months ago
A Performance Evaluation of the Nehalem Quad-Core Processor for Scientific Computing
In this work we present an initial performance evaluation of Intel's latest, secondgeneration quad-core processor, Nehalem, and provide a comparison to first-generation AMD a...
Kevin J. Barker, Kei Davis, Adolfy Hoisie, Darren ...
HPCA
2011
IEEE
12 years 11 months ago
Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism
As the web becomes the platform of choice for execution of more complex applications, a growing portion of computation is handed off by developers to the client side to reduce net...
Mojtaba Mehrara, Po-Chun Hsu, Mehrzad Samadi, Scot...