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VMCAI
2009
Springer
14 years 2 months ago
LTL Generalized Model Checking Revisited
Given a 3-valued abstraction of a program (possibly generated using rogram analysis and predicate abstraction) and a temporal logic formula, generalized model checking (GMC) checks...
Patrice Godefroid, Nir Piterman
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
14 years 1 months ago
Rapid Generation of Thermal-Safe Test Schedules
Overheating has been acknowledged as a major issue in testing complex SOCs. Several power constrained system-level DFT solutions (power constrained test scheduling) have recently ...
Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu...
CODES
2006
IEEE
14 years 1 months ago
Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability
Reliability in embedded processors can be improved by control flow checking and such checking can be conducted using software or hardware. Proposed software-only approaches suffe...
Roshan G. Ragel, Sri Parameswaran
CAV
2009
Springer
215views Hardware» more  CAV 2009»
14 years 8 months ago
Homer: A Higher-Order Observational Equivalence Model checkER
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...
David Hopkins, C.-H. Luke Ong
INTEGRATION
2006
102views more  INTEGRATION 2006»
13 years 7 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...