111 search results - page 15 / 23 » Using Multiple Memory Access Instructions for Reducing Code ... |
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
—This paper presents an energy-efficient turbo decoder based on border metric encoding, which is especially suitable for non-binary circular turbo codes. In the proposed method, ...
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
—Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architec...
PCI
2005
Springer
14 years 1 months ago
2005
Springer
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
MICRO
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
TMC
2010
13 years 6 months ago
2010
—This paper presents SYNAPSE++, a system for over the air reprogramming of wireless sensor networks (WSNs). In contrast to previous solutions, which implement plain negative ackn...