111 search results - page 19 / 23 » Using Multiple Memory Access Instructions for Reducing Code ... |
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
IISWC
2008
IEEE
14 years 2 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
CCGRID
2011
IEEE
12 years 11 months ago
2011
IEEE
– Efficient implementations of the Discrete Fourier Transform (DFT) for GPUs provide good performance with large data sizes, but are not competitive with CPU code for small data ...
ECOOPWEXCEPTION
2006
Springer
13 years 11 months ago
2006
Springer
Exception handling is a powerful abstraction that can be used to help manage errors and support the construction of reliable operating systems. Using exceptions to notify system co...
SIGCOMM
2010
ACM
13 years 8 months ago
2010
ACM
Packet Classification is a key functionality provided by modern routers. Previous decision-tree algorithms, HiCuts and HyperCuts, cut the multi-dimensional rule space to separate ...