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» Using Queue Time Predictions for Processor Allocation
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DAC
2010
ACM
13 years 7 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
IJHPCA
2010
113views more  IJHPCA 2010»
13 years 6 months ago
Accurate Heterogeneous Communication Models and a Software Tool for Their Efficient Estimation
In this paper, we analyze restrictions of traditional communication performance models affecting the accuracy of analytical prediction of the execution time of collective communic...
Alexey L. Lastovetsky, Vladimir Rychkov, Maureen O...
WETICE
2009
IEEE
14 years 2 months ago
PerfCloud: GRID Services for Performance-Oriented Development of Cloud Computing Applications
—Cloud Computing, born in the e-business context, and GRID computing, originated in the e-science context, are two different but similar paradigms for managing large sets of dist...
Emilio Pasquale Mancini, Massimiliano Rak, Umberto...
ECRTS
2005
IEEE
14 years 1 months ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
CORR
2006
Springer
160views Education» more  CORR 2006»
13 years 7 months ago
On Conditional Branches in Optimal Search Trees
A commonly used type of search tree is the alphabetic binary tree, which uses (without loss of generality) "less than" versus "greater than or equal to" tests ...
Michael B. Baer