610 search results - page 80 / 122 » Using SAT in QBF |
FMCAD
2000
Springer
14 years 18 days ago
2000
Springer
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...
STOC
2002
ACM
14 years 9 months ago
2002
ACM
We investigate tradeoffs of various basic complexity measures such as size, space and width. We show examples of formulas that have optimal proofs with respect to any one of these...
ICCD
2003
IEEE
14 years 5 months ago
2003
IEEE
Multiple clock domains are a challenge for hardware specification and verification. We present a method for specifying the relations between multiple clocks, and for modeling th...
ICCD
2003
IEEE
14 years 5 months ago
2003
IEEE
This paper introduces a new method for two-level logic minimization. Unlike previous approaches, the new method uses a SAT solver as an underlying engine. While the overall minimi...
GECCO
2004
Springer
14 years 2 months ago
2004
Springer
Evolution of quantum circuits faces two major challenges: complex and huge search spaces and the high costs of simulating quantum circuits on conventional computers. In this paper ...