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» Using SAT-based techniques in power estimation
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ISLPED
1999
ACM
143views Hardware» more  ISLPED 1999»
14 years 4 days ago
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
Kanad Ghose, Milind B. Kamble
CISS
2007
IEEE
14 years 2 months ago
An EM Technique for Multiple Transmitter Localization
— We propose an expectation-maximization (EM) technique for locating multiple transmitters based on power levels observed by a set of arbitrarily-placed receivers. Multiple trans...
Jill K. Nelson, Maya R. Gupta
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
14 years 20 hour ago
Cycle-accurate macro-models for RT-level power analysis
 In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
Qinru Qiu, Qing Wu, Massoud Pedram, Chih-Shun Ding
ICANN
2003
Springer
14 years 1 months ago
Confidence Estimation Using the Incremental Learning Algorithm, Learn++
Pattern recognition problems span a broad range of applications, where each application has its own tolerance on classification error. The varying levels of risk associated with ma...
Jeffrey Byorick, Robi Polikar
WCE
2007
13 years 9 months ago
Comparing Risk Neutral Density Estimation Methods using Simulated Option Data
Abstract—In this paper I use Monte Carlo simulated option data to investigate the empirical power of six Risk Neutral Density (RND) estimation techniques. Three alternative appro...
Amine Bouden