Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
— We propose an expectation-maximization (EM) technique for locating multiple transmitters based on power levels observed by a set of arbitrarily-placed receivers. Multiple trans...
In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
Pattern recognition problems span a broad range of applications, where each application has its own tolerance on classification error. The varying levels of risk associated with ma...
Abstract—In this paper I use Monte Carlo simulated option data to investigate the empirical power of six Risk Neutral Density (RND) estimation techniques. Three alternative appro...