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» Using SAT-based techniques in power estimation
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FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
14 years 2 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
WSC
2007
13 years 10 months ago
Ant-based approach for determining the change of measure in importance sampling
Importance Sampling is a potentially powerful variance reduction technique to speed up simulations where the objective depends on the occurrence of rare events. However, it is cru...
Poul E. Heegaard, Werner Sandmann
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
14 years 8 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
BIOINFORMATICS
2010
170views more  BIOINFORMATICS 2010»
13 years 8 months ago
Joint estimation of DNA copy number from multiple platforms
DNA copy number variants (CNV) are gains and losses of segments of chromosomes, and comprise an important class of genetic variation. Recently, various microarray hybridization ba...
Nancy R. Zhang, Yasin Senbabaoglu, Jun Z. Li
TSMC
1998
117views more  TSMC 1998»
13 years 7 months ago
A mean field annealing approach to robust corner detection
—This paper is an extension of our previous paper to improve the capability of detecting corners. We proposed a method of boundary smoothing for curvature estimation using a cons...
Kwanghoon Sohn, Jung H. Kim, Winser E. Alexander