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114
Voted
ETS
2011
IEEE
224views Hardware» more  ETS 2011»
14 years 2 months ago
AVF Analysis Acceleration via Hierarchical Fault Pruning
—The notion of Architectural Vulnerability Factor (AVF) has been extensively used by designers to evaluate various aspects of design robustness. While AVF is a very accurate way ...
Michail Maniatakos, Chandra Tirumurti, Abhijit Jas...
MICRO
2002
IEEE
171views Hardware» more  MICRO 2002»
15 years 7 months ago
Orion: a power-performance simulator for interconnection networks
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad...
113
Voted
ICCS
2005
Springer
15 years 8 months ago
GIVS: Integrity Validation for Grid Security
Abstract. In this paper we address the problem of granting the correctness of Grid computations. We introduce a Grid Integrity Validation Scheme (GIVS) that may reveal the presence...
Giuliano Casale, Stefano Zanero
106
Voted
ICCD
2005
IEEE
107views Hardware» more  ICCD 2005»
15 years 11 months ago
Hardware Support for Bulk Data Movement in Server Platforms
Bulk data movement occurs commonly in server workloads and their performance is rather poor on today’s microprocessors. We propose the use of small dedicated copy engines, and p...
Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. ...
144
Voted
IPCCC
1999
IEEE
15 years 6 months ago
Accurately modeling speculative instruction fetching in trace-driven simulation
Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challe...
R. Bhargava, L. K. John, F. Matus