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CODES
2008
IEEE
13 years 9 months ago
Profiling of lossless-compression algorithms for a novel biomedical-implant architecture
In view of a booming market for microelectronic implants, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core targeting...
Christos Strydis, Georgi Gaydadjiev
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
13 years 11 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
HPCA
2012
IEEE
12 years 3 months ago
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chi
Lowering supply voltage is one of the most effective techniques for reducing microprocessor power consumption. Unfortunately, at low voltages, chips are very sensitive to process ...
Timothy N. Miller, Xiang Pan, Renji Thomas, Naser ...
BMCBI
2007
152views more  BMCBI 2007»
13 years 7 months ago
Difference-based clustering of short time-course microarray data with replicates
Background: There are some limitations associated with conventional clustering methods for short time-course gene expression data. The current algorithms require prior domain know...
Jihoon Kim, Ju Han Kim
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
14 years 13 days ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith