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JVM
2004
165views Education» more  JVM 2004»
13 years 8 months ago
Using Hardware Performance Monitors to Understand the Behavior of Java Applications
Modern Java programs, such as middleware and application servers, include many complex software components. Improving the performance of these Java applications requires a better ...
Peter F. Sweeney, Matthias Hauswirth, Brendon Caho...
CASES
2005
ACM
13 years 9 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
13 years 7 months ago
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
Nam Sung Kim, Krisztián Flautner, David Bla...
PPOPP
2005
ACM
14 years 1 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
ISCAPDCS
2003
13 years 8 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee