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ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
14 years 6 months ago
A theory of Error-Rate Testing
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...
Shideh Shahidi, Sandeep Gupta
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
14 years 6 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
CVPR
2010
IEEE
14 years 5 months ago
Parametric Dimensionality Reduction by Unsupervised Regression
We introduce a parametric version (pDRUR) of the recently proposed Dimensionality Reduction by Unsupervised Regression algorithm. pDRUR alternately minimizes reconstruction error ...
Miguel Carreira-perpinan, Zhengdong Lu
WWW
2010
ACM
14 years 4 months ago
Empirical comparison of algorithms for network community detection
Detecting clusters or communities in large real-world graphs such as large social or information networks is a problem of considerable interest. In practice, one typically chooses...
Jure Leskovec, Kevin J. Lang, Michael W. Mahoney
ASPLOS
2010
ACM
14 years 4 months ago
Conservation cores: reducing the energy of mature computations
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...
Ganesh Venkatesh, Jack Sampson, Nathan Goulding, S...
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