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» Using a High-Performance, Programmable Secure Coprocessor
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FPL
2004
Springer
154views Hardware» more  FPL 2004»
14 years 25 days ago
High Performance True Random Number Generator in Altera Stratix FPLDs
Abstract. The paper presents a high performance True Random Number Generator (TRNG) embedded in Altera Stratix Field Programmable Logic Devices (FPLDs). As a source of randomness, ...
Viktor Fischer, Milos Drutarovský, Martin S...
DAC
2002
ACM
14 years 8 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
WISA
2004
Springer
14 years 23 days ago
Hyperelliptic Curve Coprocessors on a FPGA
Abstract. Cryptographic algorithms are used in a large variety of different applications to ensure security services. It is, thus, very interesting to investigate various implement...
Howon Kim, Thomas J. Wollinger, YongJe Choi, Kyoil...
CCGRID
2006
IEEE
14 years 1 months ago
An Overview of Security Issues in Cluster Interconnects
— Widespread use of cluster systems in diverse set of applications has spurred significant interest in providing high performance cluster interconnects. A major inefficiency in...
Manhee Lee, Eun Jung Kim, Ki Hwan Yum, Mazin S. Yo...
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 4 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras