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» Using a SAT solver to generate checking sequences
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FM
2008
Springer
152views Formal Methods» more  FM 2008»
13 years 9 months ago
Constraint Prioritization for Efficient Analysis of Declarative Models
The declarative modeling language Alloy and its automatic analyzer provide an effective tool-set for building designs of systems and checking their properties. The Alloy Analyzer p...
Engin Uzuncaova, Sarfraz Khurshid
CAV
2009
Springer
209views Hardware» more  CAV 2009»
14 years 8 months ago
Static and Precise Detection of Concurrency Errors in Systems Code Using SMT Solvers
Context-bounded analysis is an attractive approach to verification of concurrent programs. Bounding the number of contexts executed per thread not only reduces the asymptotic compl...
Shuvendu K. Lahiri, Shaz Qadeer, Zvonimir Rakamari...
ENTCS
2006
103views more  ENTCS 2006»
13 years 7 months ago
Supporting SAT based BMC on Finite Path Models
The standard translation of a Bounded Model Checking (BMC) instance into a satisfiability problem, (a.k.a SAT), might produce misleading results in the case when the model under v...
Daniel Geist, Mark Ginzburg, Yoad Lustig, Ishai Ra...
TVLSI
2008
151views more  TVLSI 2008»
13 years 7 months ago
Guest Editorial Special Section on Design Verification and Validation
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
I. Harris, D. Pradhan
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
13 years 12 months ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...